Improving Computer Scalability & Reliability to Enable Continued Technology Advancement


You might ask yourself “Why would anyone want to have a public synchronizer available to download?” Usually designers just grab a flip-flop from his or her company’s or a standard cell vendor’s library. However, are these handy solutions the best course of action today? Current SoC designs have numerous clock domains providing many opportunities for metastability mischief at the crossings between these domains. Using handy solutions without fully understanding their reliability is dangerous for the design of safety-critical products

Modern flip-flop designs use high Vth transistors to reduce power while maintaining low clock-to-Q delay, but ignore synchronizer performance. Some firms have developed specialized synchronizer standard cells with high mean-time-between failures (MTBF). This measure of reliability depends on the synchronizer’s recovery time-constant tau and vulnerability window Tw. In safety-critical designs, synchronizer MTBF can be improved substantially by reducing tau at the expense of power and clock-to-Q delay. Such specialized designs provide a competitive advantage and are usually considered confidential IP that must be kept hidden.