A SUITE OF TOOLS AND IP
SIMULATE SYNCHRONIZER BEHAVIOUR & IDENTIFY ISSUES BEFORE FABRICATION.
In our world, two things are critical for success: scalability and reliability.
Scalability allows the industry to produce ICs with significantly more transistors every two years and allows engineers to manage the complexity associated with these increasingly dense System-on-Chip (SoC) devices. Reliability makes IC failures exceedingly rare despite the steady growth in their complexity. The complexity of modern IC’s can be envisioned by comparing a 7-billion transistor IC with the complexity of a 7-billion person planet.
Blendics has the first commercially available tool-set to allow IC designers to simulate synchronizer behavior and to identify issues before fabrication. Additionally, we have a myriad of professional services to support organizations through technical challenges inhibiting their ability to innovate and grow. Ourproducts and services include:
Blendics has developed advanced techniques allowing our designers to rapidly integrate tested IP cores into large FPGA designs. Such a System-on-Chip (SoC) design may involve many clock domains, disparate I/O requirements and aggressive global-timing specifications; circumstances that ordinarily lead to an extended design cycle. However, as an Altera Design Network Partner our unique design flow makes it easy for Blendics to help our clients meet their demanding time schedules.
We can help you with:
- Custom IP Core Development
- IP Core Integration
- Full System Design
MetaACE is a software tool for the simulation and analysis of the metastable behavior of bi-stable circuits such as the synchronizer flip-flops used in clock domain crossings. MetaACE provides a graphical user interface on which a user can enter simulation parameters and observe the simulated behavior and view the analysis of the results.
- Analysis of multiple corners (Frequency, Voltage, Temperature)
- Multi-stage synchronizer analysis
- Results can be extrapolated to chip-wide analysis, including process variability
- Easy to use Graphical Interface
- Simulation results verified against real silicon
- Expert consulting available on clock-domain-crossing solutions
MetaACE LTD Download Now
MetaACE LTD is a free, node-limited version of the MetaACE metastability analysis tool. MetaACE LTD provides all of the features of MetaACE except that it is limited to evaluating circuits with less than 250 nodes. Experience shows that many synchronizers can be evaluated quite well by including only bulk capacitance in the extracted netlists. MetaACE LTD allows many synchronizers to be evaluated with results typically within 5-10% of true behavior. Users can use MetaACE LTD to evaluate their designs, quickly, and use the same configuration as in the professional version of MetaACE for highly accurate simulations of fully extracted netlists.
Blendics offers custom licensed IP cores, which implement the patented Blendics DANI technology. This IP can be viewed as a wrapper that is applied to custom IP (either new or legacy), which seamlessly turns a standard clocked (synchronously designed) core into a core that is externally clockless (asynchronous). It is then ready to be assembled by the Blendics ClosureACE tool into an asynchronous NoC.
- A light-weight, low-latency asynchronous FIFO
- Token-based word-by-word flow control with multiple words-in-flight
- Support for dynamic clock frequency and voltage scaling
- No speed penalty over best-case synchronous designs
- No modification to existing tested IP
ClosureACE is a design tool, which provides interconnection between DANI-wrapped IP cores creating a fully functional asynchronous NoC. ClosureACE supports unlimited scaling of system size and guarantees all global timing constraints are met regardless of placement of the individual cores. ClosureACE enhances traditional EDA tools that are already familiar to developers.
- Point-to-point and multi-point support
- Recursive composition of network components
- Constraint-based design, allowing flexible place and route
- Integrates with traditional EDA tools
- Removes top level timing closure barriers
HardwareACE, is a hardware acceleration solution that improves system performance through the enhancement of your existing hardware and software assets. In a nutshell, we identify bottle-necks in your computer processing and then design and develop custom firmware modules for the targeted functions. A custom Function Library seamlessly integrates the modules with your current software systems through a common API. Remember, we are simply enhancing your existing systems, so there are no significant changes to your systems architecture. However, the performance gains are extremely significant and can range from 150x to 500x!
- Accelerate key software functions in hardware.
- Rapid integration with new and existing IP.
- Guaranteed to meet global timing constraints
- Flexible floor-planning
- In-house experts for system analysis and IP development
- Flexible designs with repeatable results